Definition of “technical solution” for AI chip design–related patents
Under Chinese patent law, a “technical solution” is a set of technical means, embodied as concrete product features or process steps, that applies the laws of nature to resolve a definite technical problem and thereby produces a verifiable technical effect. In the field of artificial intelligence chip design, a technical solution exists where the claimed features—considered as a whole—functionally interact to control, transform, or utilize physical entities (e.g., signals, voltages, currents, memory states, clock/power domains) in accordance with natural laws, resulting in objectively ascertainable improvements in chip operation (such as latency, throughput, power efficiency, area, reliability, thermal behavior, or on‑device model execution fidelity).
Core elements
- Product or process character: The solution must be expressed as a product (e.g., a circuit, chip, module, system) or a process (e.g., a method of execution, control, or fabrication), including improvements thereto.
- Technical means: The solution employs technical features—structures, configurations, control logic, signal paths, protocols, or physical arrangements—that operate under natural laws, not merely abstract rules.
- Technical problem: The problem addressed is a technical one, such as data‑movement bottlenecks, power/thermal constraints, signal integrity, compute utilization, memory bandwidth, or deterministic execution of AI workloads on hardware.
- Technical effect: The solution yields a demonstrable technical effect, typically measured by engineering metrics (e.g., TOPS/W, SRAM hit rate, NoC congestion reduction, DVFS stability, timing closure margin, error rate reductions attributable to hardware control).
Illustrative inclusions in AI chip design
- Microarchitecture and circuit arrangements: MAC array topology and dataflow, tensor tiling schemes bound to scratchpad/NoC behavior, pipeline staging and hazard handling, quantization/dequantization logic implemented in hardware, sparsity engines with specific gating circuits, near‑memory compute units, or error‑correction circuits tailored to AI workloads.
- Memory and interconnect: On‑chip network arbitration and routing protocols tied to tensor traffic patterns, cache/scratchpad allocations and coherence protocols optimized for AI operators, banked SRAM architectures with specific access scheduling to reduce conflicts.
- Power/clock/thermal management: Dynamic voltage and frequency scaling (DVFS) controllers informed by PVT sensors, power‑gating/island partitioning with state‑retention mechanisms, thermal throttling algorithms implemented as hardware control loops.
- ISA and firmware tightly coupled to hardware: Instruction‑set extensions for AI operations with defined execution semantics and microarchitectural support; firmware or microcode that directly manipulates hardware resources (DMA engines, prefetchers, clock domains) to achieve hardware‑level effects.
- Physical design/process: Floorplanning, placement, and routing strategies that reduce critical path length or IR drop for AI accelerators; process‑variation‑aware calibration sequences executed on chip.
Exclusions and boundary conditions
- Purely abstract subject matter is not a technical solution: mathematical methods or AI algorithms per se; rules and methods for mental activities; business rules; and mere presentation of information.
- Program features are relevant only where they have technical meaning: algorithmic or program steps can contribute to a technical solution if, and only if, they functionally interact with hardware features to produce a technical effect (e.g., a compiler scheduling pass that deterministically configures a specific DMA/no‑wait dataflow for an on‑chip scratchpad in a way that improves memory bandwidth utilization).
- Mere statements of goals, results, or performance targets (e.g., “higher accuracy,” “reduced latency”) without recitation of concrete technical features that achieve them do not constitute a technical solution.
Legal authority
- Patent Law of the People’s Republic of China, Article 2: An “invention” is a new technical solution relating to a product, a process, or an improvement thereof; a “utility model” is a technical solution relating to the shape, structure, or their combination of a product, fit for practical use.
- CNIPA Guidelines for Patent Examination (latest version): A technical solution consists of technical means that apply natural laws to solve a technical problem and obtain a corresponding technical effect. For program‑related inventions, algorithmic features may be considered when they are functionally linked with technical features to achieve a technical effect in the physical world.
Practical implications for claim drafting and examination
- Claim categories: Device/apparatus (chip, module, circuit), method (execution, control, or fabrication), and computer‑readable storage medium/device claims implementing hardware‑oriented control are generally acceptable where the technical effect arises from interaction with hardware.
- Substantiation: The specification should disclose how the claimed technical means achieve the technical effect (e.g., architectural diagrams, timing/power analyses, bandwidth models, synthesis/place‑and‑route results, or empirical benchmarks), enabling a skilled person to practice the solution and verify the effect.
- Inventive step assessment: Non‑technical features cannot support inventiveness unless they cooperate with technical features to solve a technical problem. Conversely, algorithmic choices that change hardware behavior and measurably improve chip operation may contribute to inventiveness.
Concise definition
A “technical solution,” in the context of AI chip design, is a product or process configuration comprising concrete technical features that, by applying the laws of nature, resolves a specific hardware‑oriented technical problem in AI computation and produces a verifiable technical effect on the chip’s physical operation.
